170 return (tracks & mask) !=
TRACK_BIT_NONE ? tracks & mask : tracks;
180 return wires == 0 ? SPR_WIRE_BASE : wires;
190 return pylons == 0 ? SPR_PYLON_BASE : pylons;
248 static const int _tunnel_wire_BB[4][4] = {
260 const int *BB_data = _tunnel_wire_BB[dir];
262 wire_base + sss->image_offset, PAL_NONE, ti->
x + sss->x_offset, ti->
y + sss->y_offset,
263 BB_data[2] - sss->x_offset, BB_data[3] - sss->y_offset,
BB_Z_SEPARATOR - sss->z_offset + 1,
266 BB_data[0] - sss->x_offset, BB_data[1] - sss->y_offset,
BB_Z_SEPARATOR - sss->z_offset
287 Corner halftile_corner = CORNER_INVALID;
295 byte OverridePCP = 0;
316 static const uint edge_corners[] = {
317 1 << CORNER_N | 1 << CORNER_E,
318 1 << CORNER_S | 1 << CORNER_E,
319 1 << CORNER_S | 1 << CORNER_W,
320 1 << CORNER_N | 1 << CORNER_W,
322 SpriteID pylon_base = (halftile_corner != CORNER_INVALID &&
HasBit(edge_corners[i], halftile_corner)) ? pylon_halftile : pylon_normal;
330 wireconfig[TS_NEIGHBOUR] =
MaskWireBits(neighbour, trackconfig[TS_NEIGHBOUR]);
342 PPPpreferred[i] = 0xFF;
347 for (uint k = 0; k < NUM_TRACKS_AT_PCP; k++) {
349 if (TrackSourceTile[i][k] == TS_NEIGHBOUR &&
358 if (
HasBit(wireconfig[TrackSourceTile[i][k]], TracksAtPCP[i][k])) {
361 PCPpos = (TrackSourceTile[i][k] == TS_HOME) ? i :
ReverseDiagDir(i);
366 if (
HasBit(trackconfig[TrackSourceTile[i][k]], TracksAtPCP[i][k])) {
372 if (!
HasBit(PCPstatus, i)) {
399 if (tileh[TS_HOME] == tileh[TS_NEIGHBOUR] || (isflat[TS_HOME] && isflat[TS_NEIGHBOUR])) {
400 for (uint k = 0; k < NUM_IGNORE_GROUPS; k++) {
409 if ((PPPallowed[i] & PPPpreferred[i]) != 0) PPPallowed[i] &= PPPpreferred[i];
421 if (PPPallowed[i] != 0 &&
HasBit(PCPstatus, i) && !
HasBit(OverridePCP, i) &&
426 if (
HasBit(PPPallowed[i], temp)) {
427 uint x = ti->
x + x_pcp_offsets[i] + x_ppp_offsets[temp];
428 uint y = ti->
y + y_pcp_offsets[i] + y_ppp_offsets[temp];
461 Track halftile_track;
462 switch (halftile_corner) {
463 case CORNER_W: halftile_track =
TRACK_LEFT;
break;
464 case CORNER_S: halftile_track =
TRACK_LOWER;
break;
465 case CORNER_E: halftile_track =
TRACK_RIGHT;
break;
466 case CORNER_N: halftile_track =
TRACK_UPPER;
break;
473 SpriteID wire_base = (t == halftile_track) ? wire_halftile : wire_normal;
478 int tileh_selector = !(tileh[TS_HOME] % 3) * tileh[TS_HOME] / 3;
480 assert(PCPconfig != 0);
482 sss = &RailCatenarySpriteData[Wires[tileh_selector][t][PCPconfig]];
490 sss->x_size, sss->y_size, sss->z_size, GetSlopePixelZ(ti->
x + sss->x_offset, ti->
y + sss->y_offset) + sss->z_offset,
517 if ((length % 2) && num == length) {
520 sss = &RailCatenarySpriteData[WIRE_X_FLAT_BOTH + offset];
523 sss = &RailCatenarySpriteData[WIRE_X_FLAT_SW + (num % 2) + offset];
531 sss->x_size, sss->y_size, sss->z_size, height + sss->z_offset,
543 uint x = ti->
x + x_pcp_offsets[PCPpos] + x_ppp_offsets[PPPpos];
544 uint y = ti->
y + y_pcp_offsets[PCPpos] + y_ppp_offsets[PPPpos];
545 AddSortableSpriteToDraw(pylon_base + pylon_sprites[PPPpos], PAL_NONE, x, y, 1, 1,
BB_HEIGHT_UNDER_BRIDGE, height,
IsTransparencySet(
TO_CATENARY), -1, -1);
553 uint x = ti->
x + x_pcp_offsets[PCPpos] + x_ppp_offsets[PPPpos];
554 uint y = ti->
y + y_pcp_offsets[PCPpos] + y_ppp_offsets[PPPpos];
555 AddSortableSpriteToDraw(pylon_base + pylon_sprites[PPPpos], PAL_NONE, x, y, 1, 1,
BB_HEIGHT_UNDER_BRIDGE, height,
IsTransparencySet(
TO_CATENARY), -1, -1);
575 wire_base + sss->image_offset, PAL_NONE, ti->
x + sss->x_offset, ti->
y + sss->y_offset,
576 sss->x_size, sss->y_size, sss->z_size,
598 bool disable = (p1 != 0);
609 if (rv_info->
engclass == 2 && rv_info->railtype == old_railtype) {
611 rv_info->railtype = new_railtype;